Semiconductor chips normally are formed as small, flat bodies having a generally planar front surface, a generally planar rear surface, and edges extending between these surfaces at the boundaries of the front and rear surfaces. The thickness of the chip between its front and rear surfaces generally is far smaller than the length and width of the chip, i.e., the dimensions of the front and rear surfaces in the planes of these surfaces. Typically, the chip has contacts exposed at its front surface.
Semiconductor chips commonly are provided in packages which protect the chip and facilitate handling and mounting of the chip to a larger circuit element such as a circuit board or other circuit panel. Certain types of chip packages include a rigid or flexible dielectric structure sometimes referred to as a “chip carrier” overlying the front or rear surface of the chip. The chip carrier has electrically conductive terminals. The contacts of the chip are electrically connected to the terminals. The terminals may be elongated posts projecting from the chip carrier, most commonly from the surface of the chip carrier facing away from the chip. Packages of this type are disclosed in U.S. Published Patent Applications 2005/0181544 A1, 2005/0181655 A1, and 2005/0173805, the disclosures of which are incorporated by reference herein. In other packages, the terminals are in the form of flat pads. For example, certain embodiments shown in U.S. Pat. No. 6,679,977, the disclosure of which is also incorporated by reference herein, include terminals of this type.
A packaged chip can be mounted to a circuit panel by bonding or otherwise connecting the terminals to the contact pads of the circuit panel. In some cases, the chip carrier is approximately the same size as the front or rear surface of the chip itself, and most or all of the terminals are disposed in a region of the circuit panel overlying the chip surface. In other cases, the chip carrier is larger than the chip so that the chip carrier projects outwardly beyond the edges of the chip. The terminals on the chip carrier may be larger than the contacts on the chip itself, and may be spaced at a larger spacing distance or “pitch” than the contacts of the chip. Moreover, the terminals may be arranged so that they can be more readily engaged by test equipment than the contacts of the chip itself. Also, the chip carrier provides mechanical protection for the chip during handling and mounting operations.
Certain chip packages are made with chip carriers having terminals in a region of the chip carrier projecting beyond the edges of the chip. Some of the terminals are exposed at the surface of the chip carrier facing away from the chip, and others are exposed at the opposite surface. Packages of this type can be used, for example, in a stacked module. In a stacked module, the packages are disposed one atop the other, so that the front surface of the chip in one package faces generally toward the rear surface of the chip in another package. The chip carriers extend between the adjacent chips in the stack of packages. The terminals on the various chip carriers are aligned with one another and joined to one another. Stacked arrangements of this type provide a compact mounting for multiple chips as, for example, semiconductor memory chips.
Despite considerable effort in the art devoted to development of chip packages heretofore, still further improvement would be desirable. In particular, it would be desirable to reduce the cost of the packaged chips.